Fpga-based Digit-serial Csd Fir Filter for Image Signal Format Conversion
نویسندگان
چکیده
This paper proposes the implementation of digit-serial Canonical Signed-Digit (CSD) coefficient FIR filters which can be used as format conversion filters in place of the ones employed for the MPEG2 TM5 (test model 5). A canonical digit representation of signed numbers is used to reduce the complexities in multiply operations. Practical design guidelines of digit-serial CSD FIR filter are provided. An analysis of the performance comparison of the bit-serial and digit-serial CSD FIR filters on a Xilinx XC4010 FPGA is described. The results show that digit-serial CSD FIR design with a digit-size of 2 bits has about 38% smaller area-time product than that of a bit-serial implementation. Therefore, the proposed digit-serial CSD FIR filter is a compact and efficient implementation of a real-time FIR filter on field programmable gate arrays (FPGAs).
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